The present invention relates to power amplifiers for amplifying radio frequency signals, and in particular, protecting such power amplifiers from breakdown due to excessively high output voltages.
Power amplifiers for wireless communication applications are often subjected to elevated voltages and extreme voltage standing wave ratios (VSWRs). These power amplifiers are preferably constructed using an array of Gallium Arsenide or like heterojunction bipolar transistors (HBTs), which are known to break down under such elevated voltages and extreme VSWRs. For example, the base collector breakdown voltage for a two micron HBT process is approximately 24 volts, wherein the collector emitter breakdown voltage is significantly less, at approximately 14 volts. Even when power supply voltages are significantly less than either of these breakdown voltages, leakage currents entering the base regions of the transistors experience beta multiplication if they are not provided with a good path to ground through the base contact.
Breakdown problems typically occur during portions of the radio frequency cycle just before and after transistor conduction. When the output device is not conducting and the collector current is close to zero, the collector voltage exhibits a xe2x80x9cringingxe2x80x9d phenomenon. The waveform for the collector voltage is influenced by a number of factors, such as: the matching network, the compression state of the amplifier, the amplifier bias, the low output impedance at the output of the amplifier, and the termination of any harmonics. FIG. 1 illustrates the excessive collector voltages (VC) when the collector current (IC) for an HBT approaches zero. The corresponding base voltages (VB) are also provided. For the simulation represented in FIG. 1, the power supply voltage is 3.5 volts; however, the peak voltages at the collector will often exceed twice the power supply voltage under normal conditions when the collector current is close to zero. Under extreme VSWR conditions, the voltages can exceed three times the supply voltage. In the example of FIG. 1, the first and third collector voltage peaks in each cycle occur when the base node has not been pulled to ground, but is biased at a point where the collector current is biased off. Hence, the base emitter voltage applied to the device is not capable of expelling charges introduced into the base region. At these points in the radio frequency (RF) cycle, the device breakdown is probably closer to the collector emitter voltage thresholds than the more optimistic collector base breakdown voltages.
When the transistor is subjected to extreme VSWR conditions, the fundamental signal and associated harmonics are reflected back to the collector of the output transistor. As the phase is rotated around the Smith chart, the collector waveform during the portion of the cycle when the transistor is off will experience various conditions of constructive interference. Likewise, there is a good chance that these peaks will occur when the base has not been effectively grounded. Thus, under elevated supply voltages, such as 5 volts, the collector emitter breakdown voltage of the device may be exceeded.
FIG. 2 illustrates this phenomenon. A mismatched load on the transistor may trigger sub-harmonic oscillations in the bias network, which leads to significant variations in collector current (IC) from cycle to cycle. For a supply voltage of 3.5 volts, the peak collector voltage (VC) may reach 12 volts. Further, the peak collector voltage (VC) occurs just as the base voltage (VB) is approaching the base emitter threshold, which turns the device on. At this point in the cycle, any leakage current at the base collector junction of the transistor will see beta multiplication. The added power dissipation in the device in this example will be the beta multiplied leakage current times almost 12.0 volts, which could lead to a catastrophic failure of the device.
The output load mismatches that can lead to such conditions may be induced by a user simply touching the antenna of a mobile telephone. Essentially, the act of touching the antenna changes the output load impedance for the device, which may lead to extreme VSWR conditions and excessive voltage peaks on the collectors of the output transistors. Given the relative ease in which such conditions are induced, there is a need for a way to protect the power amplifier circuitry from these conditions in an efficient and cost-effective manner.
The present invention provides circuitry for detecting excessive voltages at the output of a power amplifier and reducing the bias provided to the amplifier upon detecting excessive voltages. By reducing the amplifier bias, the amplifier""s gain is reduced, which will effectively suppress the output voltages until the excessive voltage condition is removed. Peak detection circuitry is adapted to monitor the voltages of a radio frequency (RF) signal at the device output. When voltages for the RF output signal exceed a predefined threshold, the peak detection circuitry will provide an appropriate bias control signal to a bias network for the amplifier circuitry. The bias network is preferably configured to respond to the bias control signal by reducing the bias provided to the amplifier circuitry, thereby reducing the gain of the amplifier circuitry.
Preferably, the amount the normal bias is suppressed is multiplied by the amount the output voltage for the RF output signal exceeds the defined threshold, in order to quickly respond and compensate for the over-voltage condition. The bias signal controlling the gain of the amplifier circuitry may be adjusted using a number of techniques. For example, peak detection circuitry may be configured to reduce the amplifier bias current, or provide a select gain to the bias control proportional to the over-voltage condition.